1. Technical Field
The present invention relates to a semiconductor chip package and a printed circuit board having an embedded semiconductor chip package.
2. Description of the Related Art
In current electronic products, especially portable electronic devices, etc., the variety of consumer demands is continuously increasing. In particular, the demands for multi-functionality, compact sizes, light weight, high speeds, low costs, increased portability, real time access to the wireless Internet, and sophisticated designs are goading developers, designers, and manufacturers alike to provide superior products. Increased competition in providing such products have led to more frequent releases of newer models, exacerbating the burden on those involved. The demands related to mobile products, such as cell phones, PDA's, digital cameras, and laptops, in particular, are greater than ever, one result of which is that the electronic parts for these products are being modularized and integrated, to implement multi-functionality, compact sizes, light weight, and low costs, etc.
In the case of embedding a passive component in a semiconductor chip, there is a limit to the types of material that can be used when considering compatibility with semiconductor processes. Embedding the passive component may also increase chip size or increase cost, and thus impose a limit on applicability. Another method is to embed the passive component in a semiconductor chip package. Methods of forming a capacitor directly inside the package include methods that provide thick film types and methods that provide thin film types.
In the case of a thick film capacitor, a composite material may be used that includes a dielectric filler dispersed in the epoxy resin used for the insulation. Although this may provide superb workability, the dielectric constant may be low, to be about 30, making it difficult to implement a high-capacitance capacitor. On the other hand, a thin film capacitor may provide a high capacitance density, but there is a higher likelihood of electrical leakage caused by defects in the surface of the surface of the copper foil used for the lower electrode.
In order to form a passive component in a semiconductor chip package with greater reliability, a technique has also been conceived of forming a capacitor on the rewiring layer of a semiconductor package. In this case, however, the capacitor may be formed in-between the rewiring lines, so that there is a limit to the size of the capacitor. The material used for the capacitor may also be limited to those that are compatible with the rewiring process, and the degree of freedom may be very low in planning for the processes, with regards, for example, process temperatures and patterning methods, etc.